Memories with resistive storage elements are under development across the semiconductor industry. Such memories are geared to replace conventional random access memory (RAM) and non-volatile memory devices. The resistive memory devices include magnetoresistive random access memory (MRAM), resistive random-access memory (RRAM or ReRAM), and phase-change memory (PCM), among others. Most of the resistive memory devices are implemented in one transistor/one resistive element or one diode/one resistive element memory cell configurations, which provide minimal cell area but exhibit relatively slow read and write performance, for instance approximately 30 nanoseconds or more per operation. Thus, current resistive memory devices are not a viable substitute for much of the static RAM (SRAM) in a higher performance system where read/write operations occur within a few clock cycles. It is also difficult to produce a reliable one transistor/one resistive element or one diode/one resistive element memory.
Memory cells with one transistor and one resistive element may eventually replace embedded flash on future system on chips (SoCs), but it is desirable to use these same elements to replace the SRAM as well. Potentially, less flash would be needed, or the system could use a more efficient architecture, if the “fast” memory such as SRAM was also compact and non-volatile.
The present disclosure is illustrated by way of example and is not limited by the accompanying figures, in which like reference numbers indicate similar elements. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present disclosure.
The apparatus components have been represented where appropriate by conventional symbols in the drawings, showing only those specific details that are pertinent to understanding the embodiments of the present disclosure so as not to obscure the disclosure with details that will be readily apparent to those of ordinary skill in the art having the benefit of the description herein.